SN54HC368, SN74HC368
HEX INVERTING BUFFERS AND LINE DRIVERS
WITH 3 STATE OUTPUTS
SCLS310D - JANUARY 1996 -REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Wide Operating Voltage Range of 2 V to 6 V
D
High-Current 3-State Outputs Drive Bus
Lines, Buffer Memory Address Registers,
or Drive Up To 15 LSTTL Loads
D
Inverting Outputs
D
Low Power Consumption, 80-
A Max I
CC
D
Typical t
pd
= 10 ns
D
6-mA Output Drive at 5 V
D
Low Input Current of 1
A Max
description/ordering information
These hex inverting buffers and line drivers are
designed specifically to improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters. The 'HC368 devices
are organized as dual 4-line and 2-line
buffers/drivers with active-low output-enable
(1OE and 2OE) inputs. When OE is low, the
device passes inverted data from the A inputs to
the Y outputs. When OE is high, the outputs are
in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP - N
Tube of 25
SN74HC368N
SN74HC368N
Tube of 40
SN74HC368D
SOIC - D
Reel of 2500
SN74HC368DR
HC368
SOIC - D
Reel of 250
SN74HC368DT
HC368
-40
C to 85
C
SOP - NS
Reel of 2000
SN74HC368NSR
HC368
-40 C to 85 C
SSOP - DB
Reel of 2000
SN74HC368DBR
HC368
Tube of 90
SN74HC368PW
TSSOP - PW
Reel of 2000
SN74HC368PWR
HC368
TSSOP - PW
Reel of 250
SN74HC368PWT
HC368
CDIP - J
Tube of 25
SNJ54HC368J
SNJ54HC368J
-55
C to 125
C
CFP - W
Tube of 150
SNJ54HC368W
SNJ54HC368W
-55 C to 125 C
LCCC - FK
Tube of 55
SNJ54HC368FK
SNJ54HC368FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2A2
2Y2
NC
2A1
2Y1
1Y1
1A2
NC
1Y2
1A3
1A1
1OE
NC
1Y4
1A4
V
2OE
1Y3
GND
NC
SN54HC368 . . . FK PACKAGE
(TOP VIEW)
CC
NC - No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1OE
1A1
1Y1
1A2
1Y2
1A3
1Y3
GND
V
CC
2OE
2A2
2Y2
2A1
2Y1
1A4
1Y4
SN54HC368 . . . J OR W PACKAGE
SN74HC368 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
Copyright
2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL PRF 38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54HC368, SN74HC368
HEX INVERTING BUFFERS AND LINE DRIVERS
WITH 3 STATE OUTPUTS
SCLS310D - JANUARY 1996 -REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
OE
A
OUTPUT
Y
H
X
Z
L
H
L
L
L
H
logic diagram (positive logic)
1OE
To Three Other Channels
1A1
1Y1
1
2
3
2OE
To One Other Channel
2A1
2Y1
15
12
11
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) (see Note 1)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
35 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
70 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): D package
73
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DB package
82
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
67
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
64
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
108
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN54HC368, SN74HC368
HEX INVERTING BUFFERS AND LINE DRIVERS
WITH 3 STATE OUTPUTS
SCLS310D - JANUARY 1996 -REVISED OCTOBER 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54HC368
SN74HC368
UNIT
MIN
NOM
MAX
MIN
NOM
MAX
UNIT
VCC
Supply voltage
2
5
6
2
5
6
V
VCC = 2 V
1.5
1.5
VIH
High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VIH
High-level input voltage
VCC = 6 V
4.2
4.2
V
VCC = 2 V
0.5
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35
V
VIL
Low-level input voltage
VCC = 6 V
1.8
1.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 2 V
1000
1000
t/
v
Input transition rise/fall time
VCC = 4.5 V
500
500
ns
t/
v
Input transition rise/fall time
VCC = 6 V
400
400
ns
TA
Operating free-air temperature
-55
125
-40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
SN54HC368
SN74HC368
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
1.9
1.998
1.9
1.9
IOH = -20
A
4.5 V
4.4
4.499
4.4
4.4
VOH
VI = VIH or VIL
IOH = -20
A
6 V
5.9
5.999
5.9
5.9
V
VOH
VI = VIH or VIL
IOH = -6 mA
4.5 V
3.98
4.3
3.7
3.84
V
IOH = -7.8 mA
6 V
5.48
5.8
5.2
5.34
2 V
0.002
0.1
0.1
0.1
IOL = 20
A
4.5 V
0.001
0.1
0.1
0.1
VOL
VI = VIH or VIL
IOL = 20
A
6 V
0.001
0.1
0.1
0.1
V
VOL
VI = VIH or VIL
IOL = 6 mA
4.5 V
0.17
0.26
0.4
0.33
V
IOL = 7.8 mA
6 V
0.15
0.26
0.4
0.33
II
VI = VCC or 0
6 V
0.1
100
1000
1000
nA
IOZ
VO = VCC or 0
6 V
0.01
0.5
10
5
A
ICC
VI = VCC or 0,
IO = 0
6 V
8
160
80
A
Ci
2 V to 6 V
3
10
10
10
pF
SN54HC368, SN74HC368
HEX INVERTING BUFFERS AND LINE DRIVERS
WITH 3 STATE OUTPUTS
SCLS310D - JANUARY 1996 -REVISED OCTOBER 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25
C
SN54HC368
SN74HC368
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
50
95
145
120
tpd
A
Y
4.5 V
12
19
29
24
ns
tpd
A
Y
6 V
10
16
25
20
ns
2 V
100
190
285
238
ten
OE
Y
4.5 V
26
38
57
48
ns
ten
OE
Y
6 V
21
32
48
41
ns
2 V
50
175
265
240
tdis
OE
Y
4.5 V
21
35
53
48
ns
tdis
OE
Y
6 V
19
30
45
41
ns
2 V
28
60
90
75
tt
Any
4.5 V
8
12
18
15
ns
tt
Any
6 V
6
10
15
13
ns
switching characteristics over recommended operating free-air temperature range, C
L
= 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25
C
SN54HC368
SN74HC368
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
2 V
70
120
180
150
tpd
A
Y
4.5 V
17
24
36
30
ns
tpd
A
Y
6 V
14
20
31
25
ns
2 V
140
230
345
285
ten
OE
Y
4.5 V
30
46
69
57
ns
ten
OE
Y
6 V
28
39
59
48
ns
2 V
45
210
315
265
tt
Any
4.5 V
17
42
63
53
ns
tt
Any
6 V
13
36
53
45
ns
operating characteristics, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per buffer/driver
No load
35
pF
SN54HC368, SN74HC368
HEX INVERTING BUFFERS AND LINE DRIVERS
WITH 3 STATE OUTPUTS
SCLS310D - JANUARY 1996 -REVISED OCTOBER 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%
50%
10%
10%
90%
90%
VCC
0 V
tr
tf
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%
50%
10%
10%
90%
90%
VCC
VOH
VOL
0 V
tr
tf
Input
In-Phase
Output
50%
tPLH
tPHL
50%
50%
10%
10%
90%
90%
VOH
VOL
tr
tf
tPHL
tPLH
Out-of-Phase
Output
50%
10%
90%
VCC
VCC
VOL
0 V
Output
Control
(Low-Level
Enabling)
Output
Waveform 1
(See Note B)
50%
tPZL
tPLZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
VOH
0 V
50%
50%
tPZH
tPHZ
Output
Waveform 2
(See Note B)
VCC
Test
Point
From Output
Under Test
CL
(see Note A)
RL
VCC
S1
S2
LOAD CIRCUIT
PARAMETER
CL
tPZH
tpd or tt
tdis
ten
tPZL
tPHZ
tPLZ
1 k
1 k
50 pF
or
150 pF
50 pF
Open
Closed
RL
S1
Closed
Open
S2
Open
Closed
Closed
Open
50 pF
or
150 pF
Open
Open
--
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR
1 MHz, ZO = 50
, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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